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Verilog Operators

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Verilog Operators

Operators perform an operation on one or more operands within an expression. An expression combines operands with appropriate operators to produce the desired functional expression.

1. Arithmetic Operators

For the FPGA, division and multiplication are very expensive, and sometimes we cannot synthesize division. If we use Z or X for values, the result is unknown. The operations treat the values as unsigned.

Character Operation performed Example
+ Add b + c = 11
– Subtrac b – c = 9, -b=-10
/ Divide b / a = 2
* Multiply a * b = 50
% Modulus b % a = 0

2. Bitwise Operators

Each bit is operated, the result is the size of the largest operand, and the smaller operand is left extended with zeroes to the bigger operand’s size.

Character Operation performed Example
~ Invert each bit ~a = 3’b010
& And each bit b & c = 3’b010
| Or each bit a | b = 3’b111
^ Xor each bit a ^ b = 3’b011
^~ or ~^ Xnor each bit a ^~ b = 3’b100

3. Reduction Operators

These operators reduce the vectors to only one bit. If there are the characters z and x, the result can be a known value.

Character Operation performed Example
& And all bits &a = 1’b0, &d = 1’b0
~& Nand all bits ~&a = 1’b1
| Or all bits |a = 1’b1, |c = 1’bX
~| Nor all bits ~|a= 1’b0
^ Xor all bits ^a = 1’b1
^~ or ~^ Xnor all bits ~^a = 1’b0

4. Relational Operators

These operators compare operands and results in a 1-bit scalar Boolean value. The case equality and inequality operators can be used for unknown or high impedance values (z or x), and if the two operands are unknown, the result is a 1.

Character Operation performed Example
> Greater than a > b = 1’b0
< Smaller than a < b = 1’b1
>= Greater than or equal a >= d = 1’bX
<= Smaller than or equal a <= e = 1’bX
== Equality a == b = 1’b0
!= Inequality a != b = 1’b1
=== Case equality e === e = 1’b1
!=== Case inequality a !== d = 1’b1

5. Logical Operators

These operators compare operands and results in a 1-bit scalar Boolean value.

Character Operation performed Example
! Not true !(a && b) = 1’b1
&& Both expressions true a && b = 1’b0
|| One ore both expressions true a || b = 1’b1

6. Shift Operators

These operators shift operands to the right or left, the size is kept constant, shifted bits are lost, and the vector is filled with zeroes.

Character Operation performed Example
>> Shift right b >> 1 results 4?b010X
<< Shift left a << 2 results 4?b1000

7. Assignment Operators

There are three assignment operators, each of which performs different tasks, and are used with different data types:

  • assign (continuous assignment)
  • <= (non-blocking assignment)
  • = (blocking assignment)

8. Other Operators

These are operators used for condition testing and to create vectors.

Character Operation performed Example
?: Conditions testing test cond. ? if true do this or if not do this
{} Concatenate c = {a,b} = 8’101010×0
{{}} Replicate {3{2’b10}}= 6’b101010

9. Operators Precedence

The order of the table tells what operation is made first. The first one has the highest priority. The () can be used to override the default.

Operators precedence
+, -, !, ~ (Unary)
+,- (Binary)
<<, >>
<,>,<=,>=
==, !=
&
^, ^~ or ~^
|
&&
||
?:

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