Ring Counter

A ring counter is a special type of application of the Serial IN Serial OUT Shift register. The only difference between the shift register and the ring counter is that the last flip flop outcome is taken as the output in the shift register. But in the ring counter, this outcome is passed to the first flip flop as an input. All of the remaining things in the ring counter are the same as the shift register.

In the Ring counter

Below is the block diagram of the 4-bit ring counter. Here, we use 4 D flip flops. The same clock pulse is passed to the clock input of all the flip flops as a synchronous counter. The Overriding input(ORI) is used to design this circuit.

The Overriding input is used as clear and pre-set.

The output is 1 when the pre-set set to 0. The output is 0 when the clear set to 0. Both PR and CLR always work in value 0 because they are active low signals.

These two values(always fixed) are independent with the input D and the Clock pulse (CLK).

Working

The ORI input is passed to the PR input of the first flip flop, i.e., FF-0, and it is also passed to the clear input of the remaining three flip flops, i.e., FF-1, FF-2, and FF-3. The pre-set input set to 0 for the first flip flop. So, the output of the first flip flop is one, and the outputs of the remaining flip flops are 0. The output of the first flip flop is used to form the ring in the ring counter and referred to as Pre-set 1.

In the above table, the highlighted 1’s are pre-set 1.

The Pre-set 1 is generated when

• ORI input set to low, and that time the Clk doesn’t care.
• When the ORI input set to high, and the low clock pulse signal is passed as the negative clock edge triggered.

A ring forms when the pre-set 1 is shifted to the next flip-flop at each clock pulse.

So, 4-bit counter, 4 states are possible which are as follows:

Types of Ring Counter

The ring counter is classified into two parts which are as follows:

Straight Ring Counter

The Straight Ring Counter refers to as One hot Counter. The outcome of the last flip-flop is passed to the first flip-flop as an input. In the ring counter, the ORI input is passed to the PR input for the first flip flop and to the clear input of the remaining flip flops.

Note: The straight ring counter circulates the single 1 (or 0) bit around the ring.

Logic Diagram

Truth Table

Signal Diagram

Twisted Ring Counter

The Twisted Ring Counter refers to as a switch-tail ring Counter. Like the straight ring counter, the outcome of the last flip-flop is passed to the first flip-flop as an input. In the twisted ring counter, the ORI input is passed to all the flip flops as clear input.

Note: The twisted ring counter circulates a stream of 1’s followed by 0 around the ring.

Logic Diagram

Truth Table

Signal Diagram